Makefile Reference
v1.0.0Rules, variables, functions, directives, and automatic variables for GNU Make.
18 entries found
target: prerequisites
recipeThe fundamental unit of a Makefile. target is built by running recipe when any prerequisite is newer or target doesn't exist. The recipe must be indented with a real TAB character.
build: go build -o bin/app ./cmd/app
.PHONY: target1 target2Declares targets that are not actual files. Without this, Make would skip the recipe if a file with the target name exists.
.PHONY: build test clean build: npm run build clean: rm -rf dist/
.DEFAULT_GOAL := targetSets the target used when make is invoked with no arguments. Without this, the first non-special target is the default.
.DEFAULT_GOAL := help help: @echo "Usage: make [target]"
NAME = value | NAME := value | NAME ?= value | NAME += value= deferred expansion, := immediate expansion, ?= assign if unset, += append. Use := for performance in large Makefiles.
CC := gcc CFLAGS := -Wall -O2 SRCS ?= $(wildcard src/*.c)
override NAME = valueOverrides a variable set on the command line. Normally, command-line values take precedence over Makefile assignments.
override CFLAGS += -g
$@The target name of the current rule.
%.o: %.c $(CC) -c -o $@ $<
$<The first prerequisite.
%.o: %.c $(CC) $(CFLAGS) -c $< -o $@
$^All prerequisites (deduplicated).
app: main.o utils.o $(CC) -o $@ $^
$*The stem of a pattern rule (the part matched by %).
%.tar.gz: % tar czf $@ $*
$?All prerequisites that are newer than the target.
archive.a: $(OBJS) ar r $@ $?
$(wildcard pattern)Returns a space-separated list of existing files matching the glob pattern.
SRCS := $(wildcard src/*.c) HDRS := $(wildcard include/*.h)
$(patsubst pattern,replacement,text)Performs pattern substitution. % in pattern matches any sequence of characters, and the same sequence replaces % in the replacement.
OBJS := $(patsubst src/%.c,build/%.o,$(SRCS))
$(filter pattern,text)Returns only the words in text that match the pattern. $(filter-out) returns words that do NOT match.
C_FILES := $(filter %.c, $(ALL_FILES))
$(foreach var,list,text)Iterates over a list, expanding text with var bound to each word.
DIRS := a b c paths := $(foreach d,$(DIRS),src/$(d))
$(shell command)Runs a shell command and returns its stdout (newlines replaced with spaces).
VERSION := $(shell git describe --tags --abbrev=0) DATE := $(shell date +%Y-%m-%d)
$(subst from,to,text)Replaces every occurrence of from with to in text. Unlike patsubst, does not support % patterns.
CSV := a,b,c LIST := $(subst ,, ,$(CSV))
include <filename> | -include <filename>Includes another Makefile. Prefix with - to silently ignore missing files. Useful for generated dependency files.
-include build/.deps/*.d
ifeq (a,b) ... else ... endifConditional evaluation. ifeq tests equality; ifdef tests if a variable is non-empty.
ifeq ($(OS),Windows_NT) EXE := .exe else EXE := endif